Trimsignal among top three winners at the 10th Innovation & Technology Competition of NBG 2020

Trimsignal receives patent for dynamic frequency boosting exploiting path delay variability in ICs

Trimsignal participates at the Mobile World Congress - Barcelona 2019

Trimsignal among top three winners at the 10th Innovation & Technology Competition of NBG 2020

Trimsignal receives patent for dynamic frequency boosting exploiting path delay variability in ICs

Trimsignal participates at the Mobile World Congress - Barcelona 2019

Trimsignal
Boosting Through Clocking

Unlocking untapped hardware performance in digital IC design

Trimsignal among top three winners at the 10th Innovation & Technology Competition of NBG 2020

Trimsignal receives patent for dynamic frequency boosting exploiting path delay variability in ICs

Trimsignal participates at the Mobile World Congress - Barcelona 2019

practice_areas

APPLICATION
AREAS

ASIC

Providing ultimate clock boosting using easy to integrate hardware logic on top of existing design for maximum IC optimization in terms of speed and energy efficiency

EDA Tools

Enabling performance-per-watt efficiency through dynamic clock rate selection

FPGA

Unlocking FPGA processing speed across the whole spectrum of applications

FOUNDRY

Overcoming manufacturing related timing faults to improve production yield and lifetime reliability

Cloud/ Edge Computing

Designing clock-optimized HPC accelerators for performance and energy efficiency

our_vision

WHAT WE DO

Trimsignal makes it possible to achieve higher compute capacity/energy efficiency from given silicon real estate by adjusting clock frequency dynamically whenever and wherever possible. The simplicity and ease by which Trimsignal achieves higher energy efficiency and/or rate of computation across different ISA and process technologies will allow a broad spectrum of IC designers to integrate the patented and patent pending technology as staple digital IC design features in all future IP cores of all sizes and types.